Quatech MPAP-100 Manual do Utilizador

MPAP-100RS-232 PCMCIASYNCHRONOUS ADAPTERfor PCMCIA Card Standard compatible machinesUser's ManualQUATECH, INC. TEL: (330) 655-90005675 Hudson Ind

S# The PCMCIA socket into which the MPAP-100 must be inserted for thisconfiguration to be used. This value is a decimal number ranging from 0 to 15.

is helpful if the user allows Card Services to select resources instead of specifying them on thecommand line.

3.2 DOS Client Driver examplesExample: Attempt to configure an MPAP-100 inserted into any socket with a base address andIRQ automatically assigned by

3.3 MPAP-100 Enabler for DOSFor systems that are not using PCMCIA Card and Socket Services software, theMPAP-100 DOS enabler may be used to enable and

The enabler requires a single desired configuration to be provided on the command line.The card will not be configured if the desired configuration is

If configuration is successful, the enabler will display a message showing theconfiguration on the screen. If the MPAP-100 is not successfully config

3.4 DOS Enabler ExamplesExample: Configure the MPAP-100 in socket 0 with a base address of 300H and IRQ 5. Software control of SYNCA will be enabled.

4 Windows 95/98 InstallationWindows 95/98 maintains a registry of all known hardware installed in your computer.Inside this hardware registry Windows

2. Click the "Next" button. Select the radio button for "Search for the best driver for yourdevice." Click the "Next"

5. Windows will copy the INF file from the CD and display a final dialog indicating that theprocess is complete. Click the "Finish" button.

WARRANTY INFORMATIONQuatech Inc. warrants the MPAP-100 to be free of defects for one (1) year from the dateof purchase. Quatech Inc. will repair or r

4.2 Viewing Resources with Device ManagerThe following instructions provide step-by-step instructions on viewing resources used bythe MPAP-100 in Wind

6. If changes to the automatic configuration are necessary for compatibility with existingprograms, uncheck the "Use Automatic Settings" box

5 OS/2 Software InstallationAn OS/2 client driver is provided with the MPAP-100. This client driver works withOS/2's Card and Socket Services to

addr (required) The base I/O address of the MPAP-100. This number must be athree-digit hexadecimal value ending in 0.irq (required) The interrupt lev

5.3 OS/2 Client Driver Configuration ExamplesExample: Configure the MPAP-100 at base address 300 hex and IRQ 5. Configurationwill fail if any of the

If PCMCIA support was not selected when OS/2 was installed, add it by using theSelective Install facility in the System Setup folder. Full PCMCIA sup

6 Using the MPAP-100 with SyncdriveSyncdrive is a synchronous communications software driver package designed to aidusers of Quatech synchronous commu

7 AddressingThe MPAP-100 occupies a continuous 16-byte block of I/O addresses. For example, ifthe base address is set to 300 hex, then the MPAP-100 w

8 InterruptsThe MPAP-100 will operate using the interrupt level (IRQ) assigned by the PCMCIAsystem. Interrupts can come from the SCC, the external FI

9 SCC General InformationThe Serial Communications Controller (SCC) is a dual channel, multi-protocol datacommunications peripheral. The MPAP-100 pro

Copyright 2001 Quatech, Inc.NOTICEThe information contained in this document is protected by copyright, and cannot bereproduced in any form without t

9.1 Accessing the registersThe mode of communication desired is established and monitored through the bit valuesof the internal read and write registe

Example 3: Write data into the transmit buffer of channel A.mov dx, base ; load base addressout dx, al ; write data in ax to buffer Example 4: Read

External/Status interrupt control WR15Miscellaneous control bits: baud rate generator, DPLL control, autoecho WR14Lower byte of baud rate time constan

9.2 Baud Rate Generator ProgrammingThe baud rate generator (hereafter referred to as the BRG) of the SCC consists of a 16-bitdown counter, two 8-bit t

The MPAP-100 is a single-channel device. Portions of SCC channel B are used toaugment channel A. Channel B cannot be used for transmit, but may be u

9.5 SCC Incompatibility Warnings Due to the SCC implementation used by the MPAP-100, there are two minorincompatibilities that the software programme

10 FIFO OperationThe MPAP-100 is equipped with 1024-byte external FIFOs in the transmit and receivedata paths. These FIFOs are implemented as extensi

10.2.2 Receive FIFOThe receive FIFO can service the receiver of either channel A or channel B of the SCC.If RXSRC (bit 1) of the Configuration Registe

10.3.1 Using channel A for both transmit and receiveThis is the mode in which most applications will run. Set RXSRC (bit 1) in theConfiguration Regi

10.3.2 Using channel B for receiveThe MPAP-100 supplies only limited support for SCC channel B. This mode, therefore,is not recommended for most appl

3810.2.2 Receive FIFO ...3710.2.1 Transmit FIFO ...3710.2 Accessing

10.4 FIFO status and controlSeveral registers are used to control the FIFOs and monitor their status. These registersare detailed in other chapters o

10.4.2 Resetting the FIFOsThe FIFOs are automatically disabled and reset at powerup or when the MPAP-100 isinserted into a PCMCIA socket. The transmi

To make the external FIFOs more useful in byte-synchronous modes, the MPAP-100 canwatch for a given character to be transferred consecutively a specif

10.7 Receive FIFO timeoutWith asynchronous operational modes, the same problem exists. Namely, how is one todetermine when a reception is complete?

11 Communications RegisterThe Communications Register is used to set options pertaining to the clocks. The sourceand type of clock to be transmitted

receive unformatted serial data, as it allows the SCC receiver to be manuallyplaced into sync under program control. This bit is ignored if bit 6 is

12 Configuration RegisterThe Configuration Register is used to set the interrupt source and enable the interfacebetween the SCC and the external FIFOs

Bit 1: RXSRC --- Receive FIFO DMA Source: Thisbit determines which SCC pins are used to control transmit and receive DMAtransactions between the SCC a

13 Interrupt Status RegisterThe Interrupt Status Register is used to determine the cause of an interrupt generated bythe MPAP-100. The address of thi

14 FIFO Status RegisterThe FIFO Status Register is used to return current status information about the externalFIFOs. The address of this read-only r

6422.3.3 Bad Parameters ...6322.3.2 Insufficient Number Of Command Line Arguments ...6322.3.1 Resources N

15 FIFO Control RegisterThe FIFO Control Register is used to control the external data FIFOs. The address of thisregister is Base+A (hex). Table 13

16 Receive Pattern Character RegisterThe Receive Pattern Character Register is used to set the character value to be used inreceive pattern detection.

17 Receive Pattern Count RegisterThe Receive Pattern Count Register is used to set the counter value to be used in receivepattern detection. The addr

18 Receive FIFO Timeout RegisterThe Receive FIFO Timeout Register is used to control the operation of the externalreceive FIFO timeout feature. The a

19 External ConnectionsThe MPAP-100 is configured as a Data Terminal Equipment (DTE) device, meeting theRS-232-D standard using a DB-25 male connector

N/CN/CRxCLK (DTE)SYNCAN/CCDDGNDDSRCTSRTSRxDTxDCGND13121110987654321252423222120191817161514TM (OUTPUT)TxCLK (DTE)N/CN/CRLBK (OUTPUT)DTRN/CLLBK (OUTPUT

* Not included in the official RS-232-D specificationComm. Reg. bit 7TMTEST MODEX25TRxCA pinDATXCLK (DTE)X24N/C23PCMCIA STSCHG signalCERINGX22Comm. Re

20 DTE Interface SignalsCIRCUIT AB - SIGNAL GROUND CONNECTOR NOTATION: DGND DIRECTION: Not applicableThis conductor directly connects the DTE circui

CIRCUIT CC - DCE READY (DATA SET READY) CONNECTOR NOTATION: DSR DIRECTION: From DCEThis signal indicates the status of the local DCE by reporting to

CIRCUIT DB - TRANSMIT SIGNAL ELEMENT TIMING (DCE SOURCE) CONNECTOR NOTATION:TXCLK (DCE) DIRECTION: From DCEThis signal, generated by the DCE, provid

1 Introduction The Quatech MPAP-100 is a PCMCIA Type II (5 mm) card and is PCMCIA PC CardStandard Specification 2.1 compliant. It provides a single-ch

21 SpecificationsBus interface: PCMCIA PC Card Standard 2.1Physical Dimensions: Type II (5 mm) PCMCIA cardController: 85230-compatible 16-MHz Se

22 Software TroubleshootingThis appendix discusses how to resolve some common problems sometimes encounteredwhen using the MPAP-100 configuration soft

22.2.1 With Card and Socket ServicesThe enabler should NOT be used if any Card and Socket Services are present on thesystem. If Card and Socket Servi

The base address or IRQ value may be out of range. Make sure that the base address is ahexadecimal number between 100 hex and 3F0 hex ending in 0. M

MPAP-100 User's ManualRevision 2.22March 2004P/N 940-0090-222Quatech MPAP-100 User's Manual i

2 Hardware InstallationHardware installation for the MPAP-100 is a very simple process:1. Insert the MPAP-100 into a vacant PCMCIA Type II adapter soc

3 DOS / Windows 3.x Software InstallationTwo DOS configuration software programs are provided with the MPAP-100: a clientdriver and a card enabler.

3.1 MPAP-100 Client Driver for DOSIn order to use the MPAP-100 client driver, the system must be configured with Card andSocket Services software. Ca